Department of Computer Science

PDP-11 Processor Handbook

Double Operand Instructions

A word operation uses and affects only 16-bit word operands. If the word resides in memory it must be accessed using an even address, otherwise a memory addressing error (bus error) occurs. A byte operation uses and affects only 8-bit bytes. When the byte is in a register only the low byte is used or affected, except when using MOVB, where moving a byte operand into the low byte of a register causes a sign extension into the high byte of the register (converting an 8-bit two's complement value into an equivalent 16-bit two's complement value).

MOV	0 001 sss sss ddd ddd
MOVB	1 001 sss sss ddd ddd

Operation:	dest = srce
Condition Codes:	N: set if srce < 0; cleared otherwise Z: set if srce = 0; cleared otherwise V: cleared C: not affected
Description:	Moves the source operand to the destination operand. The previous contents of the destination are lost. The contents of the source are not affected. Note: a MOVB to a register (unique among byte instructions) extends the most significant bit of the low order byte (sign bit) into all bits of the high order byte (sign extension). Otherwise, MOVB operates on bytes exactly as MOV operates on words.
Examples:	MOV X,R1 ;loads Register 1 with the contents of memory location X MOV #20,R0 ;loads the number 20 into Register 0, "#" indicates that the value 20 is the operand MOV @#20,-(R6) ;pushes the operand contained in location 20 onto the stack MOV (R6)+,@#177566 ;pops the operand off a stack and moves it into memory location 177566 (terminal print buffer) MOV R1,R3 ;performs a register-to-register transfer MOVB R1,@#177566 ;moves a character from the low byte of Register 1 to the terminal print buffer

ADD	0 110 sss sss ddd ddd

Operation:	dest = srce + dest
Condition Codes:	N: set if result is < 0; cleared otherwise Z: set if result = 0; cleared otherwise V: set if there was arithmetic overflow as a result of the operation; that is both operands were of the same sign and the result was of the opposite sign; cleared otherwise C: set if there was a carry from the most significant bit of the result; cleared otherwise
Description:	Adds the source operand to the destination operand and stores the result at the destination address. The original contents of the destination are lost. The contents for the source are not affected. 16-bit binary addition is performed.
Examples:	ADD 20,R0 ;add memory location 20 to register ADD R1,X add register to memory location X ADD R1,R2 add register to register ADD #17750,X add memory to memory

SUB	1 110 sss sss ddd ddd

Operation:	dest = dest - srce
Condition Codes:	N: set if the result is < 0; cleared otherwise Z: set if result = 0; cleared otherwise V: set if there was arithmetic overflow as a result of the operation; that is, if the operands were of opposite signs and the sign of the source was the same as the sign of the result; cleared otherwise C: cleared if there was a carry from the most significant bit of the result; set otherwise (indicating borrow required)
Description:	Subtracts the source operand from the destination operand and leaves the result at the destination address. The original contents of the source are not affected. In double-precision arithmetic the C-bit, when set, indicates a "borrow".
Example:	SUB R1,R2   Before: After: (R1)=011111 (R0)=111111 (R2)=012345 (R2)=001234 NZVC=1111 NZVC=0000

CMP	0 010 sss sss ddd ddd
CMPB	1 010 sss sss ddd ddd

Operation:	srce - dest [in detail, srce + ~ dest + 1]
Condition Codes:	N: set if result < 0; cleared otherwise Z: set if result = 0; cleared otherwise V: set if there was arithmetic overflow; that is, if the operands were of opposite signs and the sign of the destination was the same as the sign of the reult; cleared otherwise C: cleared if there was a carry from the most significant bit of the result; set otherwise (indicating borrow required)
Description:	Compares the source and destination operands and sets the condition codes, which may then be used for arithmetic and logical conditional branches. Both operands are unaffected. The only action is to set the condition codes. The compare is customarily followed by a conditional branch instruction. Note that opposite to the subtract instruction, the operation is srce - dest, not dest - srce.

BIS	0 101 sss sss ddd ddd
BISB	1 101 sss sss ddd ddd

Operation:	dest = srce or dest
Condition Codes:	N: set if high-order bit of result set; cleared otherwise Z: set if result = 0; cleared otherwise V: cleared C: not affected
Description:	Performs an "Inclusive OR" operation between the source and destination operands and leaves the result in the destination operand; that is, correspoding bit positions as indicated in the source are set in the destination. The contents of the destination are overwritten.
Example:	BIS R0,R1   Before: After: (RO)=001234 (RO)=001234 (R1)=001111 (R1)=001335 NZVC=0000 NZVC=0000

BIT	0 011 sss sss ddd ddd
BITB	1 011 sss sss ddd ddd

Operation:	dest and srce
Condition Codes:	N: set if high-order bit of result set; cleared otherwise Z: set if the result = 0; cleared otherwise V: cleared C: not affected
Description:	Performs a "Logical AND" operation between the source and destination operands and modifies condition codes accordingly. Neither the source nor destination operands are affected. The BIT(B) instruction may be used to test whether any of the corresponding bits that are set in the destination are also set in the source or whether all corresponding bits set in the destination are clear in the source.
Example:	BIT #30,R3 ;test bits 3 and 4 of R3 to see if both are off

BIC	0 100 sss sss ddd ddd
BICB	1 100 sss sss ddd ddd

Operation:	dest = ~ srce and dest
Condition Codes:	N: set if high order bit of the result set; cleared otherwise Z: set if result = 0; cleared otherwise V: cleared C: not affected
Description:	Clears each bit in the destination that corresponds to a set bit in the source. The original contents of the destination are lost. The contents of the source are unaffected.
Example:	BIC R3,R4   Before: After: (R3)=001234 (R3)=001234 (R4)=001111 (R4)=000101 NZVC=1111 NZVC=0001